Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12261609 | Inter-PLL communication in a multi-PLL environment | Ankit Seedher, Raja Prabhu J, Purva Choudhary, Sandeep Sasi, Akash Gupta +5 more | 2025-03-25 |
| 12149255 | Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailable | Raja Prabhu J, Ankit Seedher, Rakesh Gupta, Nitesh Naidu, Shivam Agrawal +2 more | 2024-11-19 |
| 11967965 | Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailable | Raja Prabhu J, Ankit Seedher, Rakesh Gupta, Nitesh Naidu, Shivam Agrawal +2 more | 2024-04-23 |
| 11923864 | Fast switching of output frequency of a phase locked loop (PLL) | Ankit Seedher, Raja Prabhu J, Purva Choudhary, Sandeep Sasi, Akash Gupta +1 more | 2024-03-05 |
| 11588489 | Obtaining lock in a phase-locked loop (PLL) upon being out of phase-lock | Rakesh Gupta, Nitesh Naidu, Raja Prabhu J, Ankit Seedher, Shivam Agrawal | 2023-02-21 |
| 10892765 | Relocking a phase locked loop upon cycle slips between input and feedback clocks | Raja Prabhu J, Ankit Seedher | 2021-01-12 |
| 10514720 | Hitless switching when generating an output clock derived from multiple redundant input clocks | Raja Prabhu J, Ankit Seedher, Augusto Marques, Kulbhushan Thakur | 2019-12-24 |
| 9830157 | System and method for selectively delaying execution of an operation based on a search for uncompleted predicate operations in processor-associated queues | Gagan Gupta, Gurindar S. Sohi | 2017-11-28 |
| 9742414 | Reducing errors due to non-linearities caused by a phase frequency detector of a phase locked loop | Raja Prabhu J, Augusto Marques, Ankit Seedher, Sriharsha Vasadi | 2017-08-22 |
| 9652301 | System and method providing run-time parallelization of computer software using data associated tokens | Gagan Gupta, Gurindar S. Sohi | 2017-05-16 |
| 9277315 | Pop-up noise suppression in audio | Sanjeev Ranganathan, Shyam Somayajula, Lionel Cimaz | 2016-03-01 |
| 9223674 | Computer system and method for runtime control of parallelism in program execution | Gurindar S. Sohi | 2015-12-29 |
| 9218278 | Auto-commit memory | Nisha Talagala, Swaminathan Sundararaman | 2015-12-22 |
| 9124354 | Isolation and protection circuit for a receiver in a wireless communication device | Ramkishore Ganti, Sanjeev Ranganathan | 2015-09-01 |
| 9047178 | Auto-commit memory synchronization | Nisha Talagala, Swaminathan Sundararaman | 2015-06-02 |
| 8892159 | Multi-standard transceiver architecture with common balun and mixer | Ramkishore Ganti, Sanjeev Ranganathan | 2014-11-18 |
| 8843932 | System and method for controlling excessive parallelism in multiprocessor systems | Gurindar S. Sohi, Gagan Gupta | 2014-09-23 |
| 8787597 | Pop-up noise suppression in audio | Sanjeev Ranganathan, Shyam Somayajula, Lionel Cimaz | 2014-07-22 |
| 8787588 | Coupling of speakers with integrated circuit | Sanjeev Ranganathan, Shyam Somayajula, Arnold J D'Souza, Ramkishore Ganti, Lionel Cimaz | 2014-07-22 |
| 8085080 | Generation of a low jitter clock signal | Ramkishore Ganti, Patrick Guyard | 2011-12-27 |
| 7697901 | Digital variable gain mixer | Ahmed Emira, Aria Eshraghi, David R. Welland | 2010-04-13 |
| 7609781 | Wireless communication device with self calibration feature for controlling power output | Donald A. Kerth | 2009-10-27 |
| 7205828 | Voltage regulator having a compensated load conductance | — | 2007-04-17 |