Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12261609 | Inter-PLL communication in a multi-PLL environment | Srinath Sridharan, Ankit Seedher, Raja Prabhu J, Purva Choudhary, Akash Gupta +5 more | 2025-03-25 |
| 11923864 | Fast switching of output frequency of a phase locked loop (PLL) | Srinath Sridharan, Ankit Seedher, Raja Prabhu J, Purva Choudhary, Akash Gupta +1 more | 2024-03-05 |
| 11799487 | Fractional sampling-rate converter to generate output samples at a higher rate from input samples | Raja Prabhu J, Debasish Behera, Akash Gupta, Venkata Krishna Mohan Panchireddi | 2023-10-24 |
| 11711087 | Reducing noise contribution in compensating for unequal successive time periods of a reference clock in a fractional-N phase locked loop | Raja Prabhu J, Harshavardhan Reddy | 2023-07-25 |
| 11658667 | Reduction of noise in output clock due to unequal successive time periods of a reference clock in a fractional-N phase locked loop | Raja Prabhu J, Harshavardhan Reddy | 2023-05-23 |