Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431871 | System of free running oscillators for digital system clocking immune to process, voltage and temperature (PVT) variations | — | 2025-09-30 |
| 12417078 | Floating point accumulater with a single layer of shifters in the significand feedback | Matthew M. Kim | 2025-09-16 |
| 11983509 | Floating-point accumulator | Matthew M. Kim | 2024-05-14 |
| 11967955 | Fast clocked storage element | — | 2024-04-23 |
| 11831316 | System of free running oscillators for digital system clocking immune to process, voltage and temperature (PVT) variations | — | 2023-11-28 |
| 11558041 | Fast clocked storage element | — | 2023-01-17 |
| 11442696 | Floating point multiply-add, accumulate unit with exception processing | Matthew M. Kim | 2022-09-13 |
| 11429349 | Floating point multiply-add, accumulate unit with carry-save accumulator | Matthew M. Kim | 2022-08-30 |
| 11411553 | System of free running oscillators for digital system clocking immune to process, voltage and temperature (PVT) variations | — | 2022-08-09 |
| 11366638 | Floating point multiply-add, accumulate unit with combined alignment circuits | Matthew M. Kim | 2022-06-21 |
| 10707839 | System of free running oscillators for digital system clocking immune to process, voltage, and temperature (PVT) variations | — | 2020-07-07 |
| 7509486 | Encryption processor for performing accelerated computations to establish secure network sessions connections | David Chin, Aamir A. Farooqui | 2009-03-24 |
| 6553541 | Reduced-complexity sequence detection | Borivoje Nikolic, Leo Fu, Michael Leung, Richard G. Yamasaki | 2003-04-22 |
| 6353843 | High performance universal multiplier circuit | Farzad Chehrazi, Aamir A. Farooqui | 2002-03-05 |
| 6301599 | Multiplier circuit having an optimized booth encoder/selector | Farzad Chehrazi, Aamir A. Farooqui | 2001-10-09 |
| 6282556 | High performance pipelined data path for a media processor | Farzad Chehrazi | 2001-08-28 |
| 6243728 | Partitioned shift right logic circuit having rounding support | Aamir A. Farooqui, Farzad Chehrazi, Wei Li, Andy W. Yu | 2001-06-05 |
| 6232810 | Flip-flop | Vladimir Stojanovic | 2001-05-15 |
| 6128641 | Data processing unit with hardware assisted context switching capability | Rod G. Fleck, Roger D. Arnold, Bruce Holmer, Eric Chesters | 2000-10-03 |
| 4992938 | Instruction control mechanism for a computing system with register renaming, map table and queues indicating available registers | John Cocke, Gregory F. Grohoski | 1991-02-12 |
| 4847759 | Register selection mechanism and organization of an instruction prefetch buffer | — | 1989-07-11 |
| 4714994 | Instruction prefetch buffer control | Daniel T. Ling | 1987-12-22 |
| 4700086 | Consistent precharge circuit for cascode voltage switch logic | Daniel T. Ling, Norman Raver | 1987-10-13 |