Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| RE37305 | Virtual memory address translation mechanism with controlled data persistence | Albert Chang, Mark F. Mergen, George Radin | 2001-07-31 |
| 5805832 | System for parametric text to text language translation | Peter F. Brown, Stephen Andrew Della Pietra, Vincent J. Della Pietra, Frederick Jelinek, Jennifer Lai +1 more | 1998-09-08 |
| 5768603 | Method and system for natural language translation | Peter F. Brown, Stephen Andrew Della Pietra, Vincent J. Della Pietra, Frederick Jelinek, Jennifer Lai +1 more | 1998-06-16 |
| 5477451 | Method and system for natural language translation | Peter F. Brown, Stephen Andrew Della Pietra, Vincent J. Della Pietra, Frederick Jelinek, Jennifer Lai +1 more | 1995-12-19 |
| 4992938 | Instruction control mechanism for a computing system with register renaming, map table and queues indicating available registers | Gregory F. Grohoski, Vojin G. Oklobdzija | 1991-02-12 |
| 4969118 | Floating point unit for calculating A=XY+Z having simultaneous multiply and add | Robert K. Montoye | 1990-11-06 |
| 4937736 | Memory controller for protected memory with automatic access granting capability | Albert Chang, Mark F. Mergen, Richard R. Oehler | 1990-06-26 |
| 4802091 | Method for improving the efficiency of arithmetic code generation in an optimizing compiler using the technique of reassociation | Peter Markstein | 1989-01-31 |
| 4719568 | Hierarchical memory system including separate cache memories for storing data and instructions | Francis P. Carrubba, Norman H. Kreitzer | 1988-01-12 |
| 4710868 | Interconnect scheme for shared memory local networks | Brent Tzion Hailpern | 1987-12-01 |
| 4656583 | Method for improving global common subexpression elimination and code motion in an optimizing compiler | Marc A. Auslander, Peter Markstein | 1987-04-07 |
| 4642765 | Optimization of range checking | Peter Markstein, Victoria I. Markstein | 1987-02-10 |
| 4638426 | Virtual memory address translation mechanism with controlled data persistence | Albert Chang, Mark F. Mergen, George Radin | 1987-01-20 |
| 4589065 | Mechanism for implementing one machine cycle executable trap instructions in a primitive instruction set computing system | Marc A. Auslander, Hsieh T. Hao, Peter Markstein, George Radin | 1986-05-13 |
| 4589087 | Condition register architecture for a primitive instruction set machine | Marc A. Auslander, Hsieh T. Hao, Peter Markstein, George Radin | 1986-05-13 |
| 4587579 | System for position detection on a rotating disk | Thomas H. DiStefano | 1986-05-06 |
| 4564944 | Error correcting scheme | Richard F. Arnold, Don Coppersmith, Adrian E. Seigler, Gary E. Strait | 1986-01-14 |
| 4306286 | Logic simulation machine | Richard L. Malm, John James Shedletsky, III | 1981-12-15 |
| 4291406 | Error correction on burst channels by sequential decoding | Lalit R. Bahl, Clifton D. Cullum, Jr., Joachim Hagenauer | 1981-09-22 |