Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6266802 | Detailed grid point layout using a massively parallel logic including an emulator/simulator paradigm | Charles L. Meiley, Frank Albert Nemec, II | 2001-07-24 |
| 5673201 | Sub-problem extraction method for wiring localized congestion areas in VLSI wiring design | Charles L. Meiley | 1997-09-30 |
| 5257345 | Computer system and method for displaying functional information with parallax shift | — | 1993-10-26 |
| 5043920 | Multi-dimension visual analysis | Charles L. Meiley | 1991-08-27 |
| 4306286 | Logic simulation machine | John Cocke, John James Shedletsky, III | 1981-12-15 |