| 10720205 |
Systems and methods involving multi-bank, dual-pipe memory circuitry |
Mu-Hsiang Huang, Patrick Chuang, Lee-Lean Shu |
2020-07-21 |
| 9679631 |
Systems and methods involving multi-bank, dual- or multi-pipe SRAMs |
Patrick Chuang, Chih-Chiang Tseng, Mu-Hsiang Huang |
2017-06-13 |
| 9613684 |
Systems and methods involving propagating read and write address and data through multi-bank memory circuitry |
Lee-Lean Shu |
2017-04-04 |
| 9196324 |
Systems and methods involving multi-bank, dual- or multi-pipe SRAMs |
Patrick Chuang, Chih-Chiang Tseng, Mu-Hsiang Huang |
2015-11-24 |
| 8982649 |
Systems and methods involving multi-bank, dual- or multi-pipe SRAMs |
Patrick Chuang, Chih-Chiang Tseng, Mu-Hsiang Huang |
2015-03-17 |
| 7646215 |
Efficient method for implementing programmable impedance output drivers and programmable input on die termination on a bi-directional data bus |
Patrick Chuang, Chih-Chiang Tseng, Kookhwan Kwon |
2010-01-12 |
| 7595657 |
Dynamic dual control on-die termination |
Patrick Chuang |
2009-09-29 |
| 7093051 |
Dynamic input/output: configurable data bus for optimizing data throughput |
Pradip Banerjee |
2006-08-15 |
| 5379400 |
Method and system for determining memory refresh rate |
Edmond H. Barakat |
1995-01-03 |
| 5327531 |
Data processing system including corrupt flash ROM recovery |
Richard Bealkowski, Dhruvkumar M. Desai, Dennis Moeller, Essy Tashakori |
1994-07-05 |