Issued Patents All Time
Showing 25 most recent of 184 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12354651 | Neural network classifier using array of three-gate non-volatile memory cells | Hieu Van Tran, Steven Lemke, Vipin Tiwari, Mark Reiten | 2025-07-08 |
| 12353503 | Output array neuron conversion and calibration for analog neural memory in deep learning artificial neural network | Hieu Van Tran, Stephen Trinh, Thuan Vu, Stanley Hong, Vipin Tiwari +1 more | 2025-07-08 |
| 12347484 | Memory device of non-volatile memory cells | Hieu Van Tran, Farnood Merrikh Bayat, Xinjie Guo, Dmitri Strukov, Vipin Tiwari +1 more | 2025-07-01 |
| 12300313 | Deep learning neural network classifier using non-volatile memory array | Farnood Merrikh Bayat, Xinjie Guo, Dmitri Strukov, Hieu Van Tran, Vipin Tiwari +1 more | 2025-05-13 |
| 12283314 | Neural network classifier using array of three-gate non-volatile memory cells | Hieu Van Tran, Steven Lemke, Vipin Tiwari, Mark Reiten | 2025-04-22 |
| 12249368 | Neural network classifier using array of three-gate non-volatile memory cells | Hieu Van Tran, Steven Lemke, Vipin Tiwari, Mark Reiten | 2025-03-11 |
| 12205655 | Testing of analog neural memory cells in an artificial neural network | Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly +3 more | 2025-01-21 |
| 12200926 | Input function circuit block and output neuron circuit block coupled to a vector-by-matrix multiplication array in an artificial neural network | Hieu Van Tran, Steven Lemke, Vipin Tiwari, Mark Reiten | 2025-01-14 |
| 12198043 | Output circuit | Hieu Van Tran, Vipin Tiwari, Mark Reiten | 2025-01-14 |
| 12176039 | Setting levels for a programming operation in a neural network array | Hieu Van Tran, Stanley Hong, Stephen Trinh, Thuan Vu, Steven Lemke +1 more | 2024-12-24 |
| 12144172 | Method of forming a semiconductor device with memory cells, high voltage devices and logic devices on a substrate using a dummy area | Zhuoqiang Jia, Leo Xing, Xian Liu, Serguei Jourba | 2024-11-12 |
| 12131786 | Memory cell array with row direction gap between erase gate lines and dummy floating gates | Louisa Schneider, Xian Liu, Steven Lemke, Parviz Ghazavi, Jinho Kim +2 more | 2024-10-29 |
| 12124944 | Precise data tuning method and apparatus for analog neural memory in an artificial neural network | Hieu Van Tran, Steven Lemke, Mark Reiten | 2024-10-22 |
| 12112798 | Output circuitry for non-volatile memory array in neural network | Farnood Merrikh Bayat, Xinjie Guo, Dmitri Strukov, Hieu Van Tran, Vipin Tiwari +1 more | 2024-10-08 |
| 12061976 | Output circuits for an analog neural memory system for deep learning neural network | Hieu Van Tran, Vipin Tiwari, Mark Reiten | 2024-08-13 |
| 12057170 | Neural network array comprising one or more coarse cells and one or more fine cells | Hieu Van Tran, Stanley Hong, Stephen Trinh, Thuan Vu, Steven Lemke +1 more | 2024-08-06 |
| 12057160 | Summing circuit for neural network | Farnood Merrikh Bayat, Xinjie Guo, Dmitri Strukov, Hieu Van Tran, Vipin Tiwari +1 more | 2024-08-06 |
| 12056601 | Circuitry to compensate for data drift in analog neural memory in an artificial neural network | Hieu Van Tran, Steven Lemke, Vipin Tiwari, Mark Reiten | 2024-08-06 |
| 12046290 | Verifying or reading a cell in an analog neural memory in a deep learning artificial neural network | Hieu Van Tran, Vipin Tiwari, Mark Reiten | 2024-07-23 |
| 12033692 | Neural network classifier using array of three-gate non-volatile memory cells | Hieu Van Tran, Steven Lemke, Vipin Tiwari, Mark Reiten | 2024-07-09 |
| 12020762 | Method of determining defective die containing non-volatile memory cells | Yuri Tkachev, Jinho Kim, Cynthia Fung, Gilles Festes, Bernard Bertello +7 more | 2024-06-25 |
| 11972795 | Verification of a weight stored in a non-volatile memory cell in a neural network following a programming operation | Farnood Merrikh Bayat, Xinjie Guo, Dmitri Strukov, Hieu Van Tran, Vipin Tiwari +1 more | 2024-04-30 |
| 11968829 | Method of forming memory cells, high voltage devices and logic devices on a semiconductor substrate | Zhuoqiang Jia, Leo Xing, Xian Liu, Serguei Jourba | 2024-04-23 |
| 11915747 | Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system | Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly +2 more | 2024-02-27 |
| 11875852 | Adaptive bias decoder to provide a voltage to a control gate line in an analog neural memory array in artificial neural network | Hieu Van Tran, Thuan Vu, Stanley Hong, Stephen Trinh, Anh Ly +1 more | 2024-01-16 |