Issued Patents All Time
Showing 26–40 of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7205198 | Method of making a bi-directional read/program non-volatile floating gate memory cell | Bomy Chen, Sohrab Kianian | 2007-04-17 |
| 7190018 | Bi-directional read/program non-volatile floating gate memory cell with independent controllable control gates, and array thereof, and method of formation | Bomy Chen, Sohrab Kianian | 2007-03-13 |
| 7184345 | High speed and high precision sensing for digital multilevel non-volatile memory system | Hieu Van Tran, William Saiki, Michael S. Briner | 2007-02-27 |
| 7151021 | Bi-directional read/program non-volatile floating gate memory cell and array thereof, and method of formation | Bomy Chen, Dana Lee | 2006-12-19 |
| 7058754 | Nonvolatile memory device capable of simultaneous erase and program of different blocks | — | 2006-06-06 |
| 7038960 | High speed and high precision sensing for digital multilevel non-volatile memory system | Hieu Van Tran, William Saiki, Michael S. Briner | 2006-05-02 |
| 7015537 | Isolation-less, contact-less array of nonvolatile memory cells each having a floating gate for storage of charges, and methods of manufacturing, and operating therefor | Dana Lee, Hieu Van Tran | 2006-03-21 |
| 6992934 | Read bitline inhibit method and apparatus for voltage mode sensing | Vishal Sarin, Hieu Van Tran | 2006-01-31 |
| 6936883 | Bi-directional read/program non-volatile floating gate memory cell and array thereof, and method of formation | Bomy Chen, Dana Lee | 2005-08-30 |
| 6885600 | Differential sense amplifier for multilevel non-volatile memory | Hieu Van Tran, William Saiki, Michael S. Briner | 2005-04-26 |
| 6807610 | Method and apparatus for virtually partitioning an integrated multilevel nonvolatile memory circuit | — | 2004-10-19 |
| 6788608 | High voltage pulse method and apparatus for digital multilevel non-volatile memory integrated system | Hieu Van Tran, William Saiki, Michael S. Briner | 2004-09-07 |
| 6756632 | Integrated circuit with a reprogrammable nonvolatile switch for selectively connecting a source for a signal to a circuit | Bomy Chen, Douglas J. Lee, Kai Man Yue | 2004-06-29 |
| 6754103 | Method and apparatus for programming and testing a non-volatile memory cell for storing multibit states | — | 2004-06-22 |
| 5663907 | Switch driver circuit for providing small sector sizes for negative gate erase flash EEPROMS using a standard twin-well CMOS process | John Lattanzi, Shouchang Tsao, Chan-Sui Pang, Yueh Yale Ma | 1997-09-02 |