Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6281108 | System and method to provide power to a sea of gates standard cell block from an overhead bump grid | — | 2001-08-28 |
| 5699551 | Software invalidation in a multiple level, multiple cache system | George S. Taylor, P. Michael Farmwald, Huy X. Ngo, Allen W. Roberts | 1997-12-16 |
| 5542062 | Cache memory system employing virtual address primary instruction and data caches and physical address secondary cache | George S. Taylor, P. Michael Farmwald, Huy X. Ngo, Allen W. Roberts | 1996-07-30 |
| 5307477 | Two-level cache memory system | George S. Taylor, P. Michael Farmwald, Huy X. Ngo, Allen W. Roberts | 1994-04-26 |