Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10684860 | High performance processor system and method based on general purpose units | — | 2020-06-16 |
| 10656948 | Processor system and method based on instruction read buffer | — | 2020-05-19 |
| 10387157 | System and method for instruction set conversion based on mapping of both block address and block offset | — | 2019-08-20 |
| 10324853 | Cache system and method using track table and branch information | — | 2019-06-18 |
| 10275358 | High-performance instruction cache system and method | — | 2019-04-30 |
| 10140126 | Variable length instruction processor system and method | — | 2018-11-27 |
| 10067767 | Processor system and method based on instruction read buffer | — | 2018-09-04 |
| 10055228 | High performance processor system and method based on general purpose units | — | 2018-08-21 |
| 9990299 | Cache system and method | — | 2018-06-05 |
| 9785443 | Data cache system and method | — | 2017-10-10 |
| 9529595 | Branch processing method and system | — | 2016-12-27 |
| 9361110 | Cache-based pipline control method and system with non-prediction branch processing using a track table containing program information from both paths of a branch instruction | — | 2016-06-07 |
| 9299448 | Wide bandwidth read and write memory system and method | Bingchun Zhang | 2016-03-29 |
| 9262164 | Processor-cache system and method | Haoqi Ren | 2016-02-16 |
| 9141388 | High-performance cache system and method | Haoqi Ren | 2015-09-22 |
| 9141553 | High-performance cache system and method | Haoqi Ren | 2015-09-22 |
| 9047193 | Processor-cache system and method | Haoqi Ren | 2015-06-02 |
| 8847615 | Method, apparatus and system of parallel IC test | Hongxi Geng, Haoqi Ren, Bingchun Zhang, Changchun Zhen | 2014-09-30 |
| 8825958 | High-performance cache system and method | Haoqi Ren | 2014-09-02 |
| 8527707 | High-performance cache system and method | Haoqi Ren | 2013-09-03 |
| 8468335 | Reconfigurable system having plurality of basic function units with each unit having a plurality of multiplexers and other logics for performing at least one of a logic operation or arithmetic operation | Haoqi Ren, Zhongmin ZHAO, Bingchun Zhang, Changchun Zheng | 2013-06-18 |
| 6756184 | Method of making tall flip chip bumps | Chiou-Shian Peng, Euegene Chu, Alex Fahn, Gilbert Fane, James Chieh-Tsung Chen +1 more | 2004-06-29 |
| 6534396 | Patterned conductor layer pasivation method with dimensionally stabilized planarization | Fu-Jier Fahn, Kuo-Wei Lin, James Chieh-Tsung Chen, Eugene Cheu, Chien-Shian Peng +1 more | 2003-03-18 |
| 6319846 | Method for removing solder bodies from a semiconductor wafer | Kuo-Wei Lin, James Chieh-Tsung Chen, Eugene Chu, Alex Fahn, Chiou-Shian Peng +1 more | 2001-11-20 |
| 6163583 | Dynamic clocking apparatus and system for reducing power dissipation | Andrew W. Yu, Takahiro Kurata | 2000-12-19 |