Issued Patents All Time
Showing 26–32 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5961629 | High performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 1999-10-05 |
| 5832292 | High-performance superscalar-based computer system with out-of-order instruction execution and concurrent results distribution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 1998-11-03 |
| 5689720 | High-performance superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 1997-11-18 |
| 5560032 | High-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distribution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 1996-09-24 |
| 5539911 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 1996-07-23 |
| 5481685 | RISC microprocessor architecture implementing fast trap and exception state | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +1 more | 1996-01-02 |
| 5448705 | RISC microprocessor architecture implementing fast trap and exception state | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +1 more | 1995-09-05 |