Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10817474 | Adaptive rate compression hash processor | Yingquan Wu | 2020-10-27 |
| 10230393 | VLSI efficient Huffman encoding apparatus and method | Yingquan Wu | 2019-03-12 |
| 9934234 | Adaptive rate compression hash processor | Yingquan Wu | 2018-04-03 |
| 9882583 | VLSI efficient Huffman encoding apparatus and method | Yingquan Wu | 2018-01-30 |
| 9495244 | Dynamic per-decoder control of log likelihood ratio and decoding parameters | Earl T. Cohen, Yunxiang Wu, Christopher Brewer | 2016-11-15 |
| 9459956 | Data decoder with trapping set flip bit mapper | Zhengang Chen, AbdelHakim S. Alhussien, Yingquan Wu | 2016-10-04 |
| 9337862 | VLSI efficient Huffman encoding apparatus and method | Yingquan Wu | 2016-05-10 |
| 9329948 | Measuring cell damage for wear leveling in a non-volatile memory | Yan Li, Hao Zhong | 2016-05-03 |
| 9213600 | Dynamic per-decoder control of log likelihood ratio and decoding parameters | Earl T. Cohen, Yunxiang Wu, Christopher Brewer | 2015-12-15 |
| 9059729 | Statistical compressibility determination system and method | Yingquan Wu | 2015-06-16 |
| 9037945 | Generating partially sparse generator matrix for a quasi-cyclic low-density parity-check encoder | Yingquan Wu, Ivana Djurdjevic | 2015-05-19 |
| 8898549 | Statistical adaptive error correction for a flash memory | Hao Zhong | 2014-11-25 |
| 6848036 | Method and apparatus for faster block size calculations for interleaving | Sanjay Dave, Warangkana Tepmongkol | 2005-01-25 |
| 6839870 | Error-correcting code interleaver | Robert Fanfelle | 2005-01-04 |