Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12345050 | System wall for building interior | Kyung Yul Lee, Hong Suk Han, Jae Sung Choi | 2025-07-01 |
| 12155189 | Wirable bracket and module coupling device coupled thereto | Kyung Yul Lee, Hong Suk Han, Jae Sung Choi | 2024-11-26 |
| 12006698 | Metal material to which flammable thin-film construction interior material is adhered, and attachment structure for attaching same | Kyung Yul Lee, Hong Suk Han, Jae Sung Choi | 2024-06-11 |
| 11840844 | Unit bracket, bracket and bracket construction method for attaching to base material and wall using the same | Kyung Yul Lee, Hong-Seok Han | 2023-12-12 |
| 11319711 | Metal interior material and interior material attachment structure | Kyung Yul Lee, Hong Suk Han | 2022-05-03 |
| 11291123 | Circuit board | Kyung Yul Lee, Jun Sang Jeong, Yang Seok Lee, Man-Kee Kim, Joo-Yul Lee +1 more | 2022-03-29 |
| D903153 | Building interior material | Kyung Yul Lee, Hong Suk Han | 2020-11-24 |
| D902445 | Connection bracket of building interior material | Kyung Yul Lee, Hong Suk Han | 2020-11-17 |
| 9845543 | Method of duplicating nano pattern texture on object's surface by nano imprinting and electroforming | Kyung Yul Lee, Jun Sang Jeong | 2017-12-19 |
| 9052425 | Silicon solar cell | Kyung Yul Lee, Bong-Yul Lee, Wayne H. Choe | 2015-06-09 |
| 8422848 | Structure colour of photonic crystals, a method of manufacturing thereof and a manufacturing apparatus thereof | Kyung Yul Lee, Bong-Yul Lee, Wayne H. Choe | 2013-04-16 |
| 7642140 | CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and method of forming same | Geum-Jong Bae, Tae-Hee Choe, Sang-Su Kim, Hwa-Sung Rhee, Nae-In Lee | 2010-01-05 |
| 7195987 | Methods of forming CMOS integrated circuit devices and substrates having buried silicon germanium layers therein | Geum-Jong Bae, Tae-Hee Choe, Sang-Su Kim, Hwa-Sung Rhee, Nae-In Lee | 2007-03-27 |
| 6914301 | CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same | Geum-Jong Bae, Tae-Hee Choe, Sang-Su Kim, Hwa-Sung Rhee, Nae-In Lee | 2005-07-05 |
| 6633066 | CMOS integrated circuit devices and substrates having unstrained silicon active layers | Geum-Jong Bae, Tae-Hee Choe, Sang-Su Kim, Hwa-Sung Rhee, Nae-In Lee | 2003-10-14 |
| 5746883 | Apparatus for bonding semiconductor wafers | Gi-ho Cha, Chi-jung Kang, Byung Hun Lee | 1998-05-05 |
| 5665631 | SOI substrate manufacturing method | Byoung Hun Lee, Chi-jung Kang, Gi-ho Cha | 1997-09-09 |