Issued Patents All Time
Showing 1–25 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8902673 | Method of testing a semiconductor memory device | Hong-Beom Kim | 2014-12-02 |
| 8786303 | Semiconductor device having a plurality of pads | Kab Yong Kim, Yong Hwan Jeong | 2014-07-22 |
| 7941714 | Parallel bit test apparatus and parallel bit test method capable of reducing test time | Yong-Hwan Cho, Kwun-Soo Cheon, Seung-whan Seo | 2011-05-10 |
| 7868438 | Multi-chip package for reducing parasitic load of pin | Byung-Se So, Dong-Ho Lee | 2011-01-11 |
| 7746712 | Semiconductor memory device including post package repair control circuit and post package repair method | Jae-Sung Kang, Byung-Heon Kwak, Seung-whan Seo, Sang Joon Ryu, Hyun Tae LIM | 2010-06-29 |
| 7657713 | Memory using packet controller and memory | Bok-Gue Park, Dong-Il Seo, Woo-Seop Jeong | 2010-02-02 |
| 7566958 | Multi-chip package for reducing parasitic load of pin | Byung-Se So, Dong-Ho Lee | 2009-07-28 |
| 7262479 | Layout structure of fuse bank of semiconductor memory device | Eun Sung Seo | 2007-08-28 |
| 7148563 | Multi-chip package for reducing parasitic load of pin | Byung-Se So, Dong-Ho Lee | 2006-12-12 |
| 6992943 | System and method for performing partial array self-refresh operation in a semiconductor memory device | Hyong-Ryol Hwang, Jong-Hyun Choi | 2006-01-31 |
| 6980036 | Semiconductor device comprising frequency multiplier of external clock and output buffer of test data and semiconductor test method | Kyoung-Hwan Kwon, Kyu-hyoun Kim | 2005-12-27 |
| 6819617 | System and method for performing partial array self-refresh operation in a semiconductor memory device | Hyong-Ryol Hwang, Jong-Hyun Choi | 2004-11-16 |
| 6751132 | Semiconductor memory device and voltage generating method thereof | Jae Hoon Kim | 2004-06-15 |
| 6590822 | System and method for performing partial array self-refresh operation in a semiconductor memory device | Hyong-Ryol Hwang, Jong-Hyun Choi | 2003-07-08 |
| 6560158 | Power down voltage control method and apparatus | Jong-Hyun Choi, Jei-Hwan Yoo, Jong-Eon Lee | 2003-05-06 |
| 6510096 | Power down voltage control method and apparatus | Jong-Hyun Choi, Jei-Hwan Yoo, Jong-Eon Lee | 2003-01-21 |
| 6476646 | Sense amplifier of semiconductor integrated circuit | Jae-Yoon Sim, Woo-Seop Jeong, Kyung Ho Kim | 2002-11-05 |
| 6343036 | Multi-bank dynamic random access memory devices having all bank precharge capability | Churoo Park, Chull-Soo Kim, Myung Ho Kim, Seung Hun Lee, Si-Yeol Lee +3 more | 2002-01-29 |
| 6326815 | Sense amplifier of semiconductor integrated circuit | Jae-Yoon Sim, Woo-Seop Jeong, Kyung Ho Kim | 2001-12-04 |
| 6281745 | Internal power supply voltage generating circuit of semiconductor memory device | Jae Hoon Kim, Hoon Ryu | 2001-08-28 |
| 6058063 | Integrated circuit memory devices having reduced power consumption requirements during standby mode operation | — | 2000-05-02 |
| 5999021 | Pad signal detecting circuit in a semiconductor device for detecting a reference voltage in a high-speed interface | — | 1999-12-07 |
| 5999031 | Semiconductor device with bus line loading compensation circuit | — | 1999-12-07 |
| 5838990 | Circuit in a semiconductor memory for programming operation modes of the memory | Churoo Park, Chull-Soo Kim, Myung Ho Kim, Seung Hun Lee, Si-Yeol Lee +3 more | 1998-11-17 |
| 5835956 | Synchronous dram having a plurality of latency modes | Churoo Park, Chull-Soo Kim, Myung Ho Kim, Seung Hun Lee, Si-Yeol Lee +3 more | 1998-11-10 |