Issued Patents All Time
Showing 76–100 of 100 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6897699 | Clock distribution network with process, supply-voltage, and temperature compensation | Huy M. Nguyen, Roxanne Vu | 2005-05-24 |
| 6876248 | Signaling accommodation | Huy M. Nguyen | 2005-04-05 |
| 6861884 | Phase synchronization for wide area integrated circuits | Huy M. Nguyen, Leung Yu, Jade M. Kizer | 2005-03-01 |
| 6819137 | Technique for voltage level shifting in input circuitry | Yueyong Wang, Jade M. Kizer, Chanh Tran | 2004-11-16 |
| 6806728 | Circuit and method for interfacing to a bus channel | Huy M. Nguyen, Roxanne Vu | 2004-10-19 |
| 6798243 | Apparatus and method for level-shifting input receiver circuit from high external voltage to low internal supply voltage | Huy M. Nguyen, Roxanne Vu, Jade M. Kizer | 2004-09-28 |
| 6781416 | Push-pull output driver | Huy M. Nguyen, Roxanne Vu | 2004-08-24 |
| 6760857 | System having both externally and internally generated clock signals being asserted on the same clock pin in normal and test modes of operation respectively | Leung Yu | 2004-07-06 |
| 6759881 | System with phase jumping locked loop circuit | Jade M. Kizer, Roxanne Vu, Craig E. Hampel | 2004-07-06 |
| 6731148 | Apparatus and method for generating clock signals | Stefanos Sidiropoulos | 2004-05-04 |
| 6727759 | Collective automatic gain control | Huey Nguyen, Leung Yu, Jade M. Kizer, Roxanne Vu | 2004-04-27 |
| 6643787 | Bus system optimization | Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more | 2003-11-04 |
| 6600338 | Apparatus and method for level-shifting input receiver circuit from high external voltage to low internal supply voltage | Huy M. Nguyen, Roxanne Vu, Jade M. Kizer | 2003-07-29 |
| 6600374 | Collective automatic gain control | Huey Nguyen, Leung Yu, Jade M. Kizer, Roxanne Vu | 2003-07-29 |
| 6539072 | Delay locked loop circuitry for clock delay adjustment | Kevin S. Donnelly, Pak Shing Chau, Mark A. Horowitz, Thomas H. Lee, Mark G. Johnson +7 more | 2003-03-25 |
| 6509756 | Method and apparatus for low capacitance, high output impedance driver | Leung Yu, Roxanne Vu, Huy M. Nguyen, James A. Gasbarro | 2003-01-21 |
| 6504405 | Differential amplifier with selectable hysteresis and buffered filter | Huy M. Nguyen | 2003-01-07 |
| 6469555 | Apparatus and method for generating multiple clock signals from a single loop circuit | Stefanos Sidiropoulos | 2002-10-22 |
| 6462588 | Asymmetry control for an output driver | Huy M. Nguyen | 2002-10-08 |
| 6384637 | Differential amplifier with selectable hysteresis and buffered filter | Huy M. Nguyen | 2002-05-07 |
| 6369652 | Differential amplifiers with current and resistance compensation elements for balanced output | Huy M. Nguyen, Roxanne Vu | 2002-04-09 |
| 6330193 | Method and apparatus for low capacitance, high output impedance driver | Leung Yu, Roxanne Vu, Huy M. Nguyen, James A. Gasbarro | 2001-12-11 |
| 6133773 | Variable delay element | Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark +3 more | 2000-10-17 |
| 6125157 | Delay-locked loop circuitry for clock delay adjustment | Kevin S. Donnelly, Pak Shing Chau, Mark A. Horowitz, Thomas H. Lee, Mark G. Johnson +6 more | 2000-09-26 |
| 6047346 | System for adjusting slew rate on an output of a drive circuit by enabling a plurality of pre-drivers and a plurality of output drivers | Jason C. Wei, Tsyr-Chyang Ho, Samir A. Patel, Yiu-Fai Chan | 2000-04-04 |