Issued Patents All Time
Showing 51–75 of 98 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9684321 | On-chip regulator with variable load compensation | Brian S. Leibowitz, Michael D. Bucher, Lei Luo, Chaofeng Huang, Huy M. Nguyen +2 more | 2017-06-20 |
| 9680436 | System and method for setting analog front end DC gain | Gaurav Malhotra | 2017-06-13 |
| 9680430 | Mismatched differential circuit | Mohammad Hekmat | 2017-06-13 |
| 9674008 | Body-biased slicer design for predictive decision feedback equalizers | Mohammad Hekmat | 2017-06-06 |
| 9645631 | Optimizing power in a memory device | Dinesh Patil, Farrukh Aquil, Kambiz Kaviani, Frederick A. Ware | 2017-05-09 |
| 9595975 | Low-latency high-gain current-mode logic slicer | Sanquan Song | 2017-03-14 |
| 9571155 | Method of startup sequence for a panel interface | Gaurav Malhotra | 2017-02-14 |
| 9571311 | Adaptive cyclic offset cancellation for the receiver front-end of high-speed serial links | Sabarish Sankaranarayanan | 2017-02-14 |
| 9536495 | System for relayed data transmission in a high-speed serial link | Wei Xiong | 2017-01-03 |
| 9531570 | CML quarter-rate predictive feedback equalizer architecture | Mohammad Hekmat | 2016-12-27 |
| 9515856 | Offset and decision feedback equalization calibration | Kambiz Kaviani, Jason C. Wei, Aliazam Abbasfar | 2016-12-06 |
| 9501433 | Semiconductor memory systems with on-die data buffering | Frederick A. Ware, Suresh Rajan, Mohammad Hekmat, Dinesh Patil | 2016-11-22 |
| 9489323 | Folded memory modules | Suresh Rajan, Ravindranath Kollipara, Ian Shaeffer, David A. Secker | 2016-11-08 |
| 9484891 | Multi-modal communication interface | Chaofeng Huang | 2016-11-01 |
| 9471518 | Multi-modal memory interface | Wendemagegnehu Beyene | 2016-10-18 |
| 9432227 | Partial response decision feedback equalizer with selection circuitry having hold state | Kambiz Kaviani, Aliazam Abbasfar | 2016-08-30 |
| 9431089 | Optimizing power in a memory device | Dinesh Patil, Farrukh Aquil, Kambiz Kaviani, Frederick A. Ware | 2016-08-30 |
| 9417807 | Data buffer with strobe-based primary interface and a strobe-less secondary interface | Kambiz Kaviani, Dinesh Patil, Mohammad Hekmat | 2016-08-16 |
| 9413339 | Apparatus and method for offset cancellation in duty cycle corrections | Mohammad Hekmat | 2016-08-09 |
| 9344305 | PVT tolerant differential circuit | Mohammad Hekmat | 2016-05-17 |
| 9312865 | Bimodal serial link CDR architecture | Sanquan Song | 2016-04-12 |
| 9281816 | Modulated on-die termination | Farshid Aryanfar, Ravindranath Kollipara, Xingchao Yuan | 2016-03-08 |
| 9197395 | Point to multi-point clock-forwarded signaling for large displays | Nasrin Jaffari | 2015-11-24 |
| 9165615 | Coded differential intersymbol interference reduction | Aliazam Abbasfar, Kambiz Kaviani, Wendemagegnehu Beyene, Carl W. Werner | 2015-10-20 |
| 9158679 | Data buffer with a strobe-based primary interface and a strobe-less secondary interface | Kambiz Kaviani, Dinesh Patil, Mohammad Hekmat | 2015-10-13 |