SS

Stephen P. Sample

QS Quickturn Design Systems: 30 patents #1 of 71Top 2%
IN Intel: 15 patents #2,741 of 30,777Top 9%
QI Quickturn Systems, Incorporated: 4 patents #1 of 6Top 20%
DC Drc Computer: 3 patents #2 of 5Top 40%
SF Security First: 2 patents #23 of 35Top 70%
MS Monterey Design Systems: 1 patents #21 of 38Top 60%
📍 Saratoga, CA: #219 of 2,933 inventorsTop 8%
🗺 California: #10,539 of 386,348 inventorsTop 3%
Overall (All Time): #73,699 of 4,157,543Top 2%
42
Patents All Time

Issued Patents All Time

Showing 26–42 of 42 patents

Patent #TitleCo-InventorsDate
6020760 I/O buffer circuit with pin multiplexing Michael Butts, Kevin A. Norman, Rakesh Patel 2000-02-01
6011730 Programmable logic device with multi-port memory Michael Butts, Kevin A. Norman, Rakesh Patel, Chao-Chiang Chen 2000-01-04
6011744 Programmable logic device with multi-port memory Michael Butts, Kevin A. Norman, Rakesh Patel, Chao-Chiang Chen 2000-01-04
5963735 Hardware logic emulation system Michael R. D'Amour, Thomas S. Payne 1999-10-05
5960191 Emulation system with time-multiplexed interconnect Mikhail Bershteyn, Michael Butts, Jerry R. Bauer 1999-09-28
5943490 Distributed logic analyzer for use in a hardware logic emulation system 1999-08-24
5887158 Switching midplane and interconnecting system for interconnecting large numbers of signals Terry Goode 1999-03-23
5870410 Diagnostic interface system for programmable logic system development Kevin A. Norman, Rakesh Patel, Michael Butts 1999-02-09
5841967 Method and apparatus for design verification using emulation and simulation Mikhail Bershteyn 1998-11-24
5821773 Look-up table based logic element with complete permutability of the inputs to the secondary signals Kevin A. Norman, Rakesh Patel, Michael Butts 1998-10-13
5644515 Hardware logic emulation system capable of probing internal nodes in a circuit design undergoing emulation Michael R. D'Amour, Thomas S. Payne 1997-07-01
5477475 Method for emulating a circuit design using an electrically reconfigurable hardware emulation apparatus Michael R. D'Amour, Thomas S. Payne 1995-12-19
5452239 Method of removing gated clocks from the clock nets of a netlist for timing sensitive implementation of the netlist in a hardware emulation system Wei-Jin Dai, Louis Galbiati, III, Joseph Varghese, Dam Van Bui 1995-09-19
5352123 Switching midplane and interconnection system for interconnecting large numbers of signals Terry Goode 1994-10-04
5329470 Reconfigurable hardware emulation system Michael R. D'Amour, Thomas S. Payne 1994-07-12
5114353 Multiple connector arrangement for printed circuit board interconnection 1992-05-19
5109353 Apparatus for emulation of electronic hardware system Michael R. D'Amour, Thomas S. Payne 1992-04-28