MB

Mikhail Bershteyn

CS Cadence Design Systems: 6 patents #235 of 2,263Top 15%
QS Quickturn Design Systems: 6 patents #10 of 71Top 15%
SY Synopsys: 3 patents #460 of 2,302Top 20%
ME Mitsubishi Electric: 2 patents #243 of 959Top 30%
📍 Queens, NY: #17 of 268 inventorsTop 7%
🗺 New York: #7,917 of 115,490 inventorsTop 7%
Overall (All Time): #245,519 of 4,157,543Top 6%
18
Patents All Time

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDate
12340155 Detecting instability in combinational loops in electronic circuit designs Srivatsan Raghavan, Vinod CHANDRASEKARAN 2025-06-24
12340157 Non-functional loopback-paths removal from IO-pads using logic replication Florent Sébastien Marc Emmanuel Claude Duru, Gilles Pierre Rémond, Olivier Coudert 2025-06-24
12265122 Memory profiler for emulation Prashant Kumar Mishra, Kiran Lokhande, Srivatsan Raghavan 2025-04-01
8959010 Emulation system with improved reliability of interconnect and a method for programming such interconnect Mitchell G. Poplack, Viktor Salitrennik 2015-02-17
8743735 Emulation system for verifying a network device Stephen Seeley 2014-06-03
8612201 Hardware emulation system having a heterogeneous cluster of processors Mitchell G. Poplack, Beshara Elmufdi 2013-12-17
8468009 Hardware emulation unit having a shadow processor Beshara Elmufdi 2013-06-18
8027828 Method and apparatus for synchronizing processors in a hardware emulation system Charles R. Berghorn, Mitchell G. Poplack 2011-09-27
7908465 Hardware emulator having a selectable write-back processor unit Mitchell G. Poplack 2011-03-15
7739097 Emulation system with time-multiplexed interconnect Stephen P. Sample, Michael Butts, Jerry R. Bauer 2010-06-15
6732068 Memory circuit for use in hardware emulation system Stephen P. Sample, Michael Butts, Jerry R. Bauer 2004-05-04
6377912 Emulation system with time-multiplexed interconnect Stephen P. Sample, Michael Butts, Jerry R. Bauer 2002-04-23
6058492 Method and apparatus for design verification using emulation and simulation Stephen P. Sample 2000-05-02
5960191 Emulation system with time-multiplexed interconnect Stephen P. Sample, Michael Butts, Jerry R. Bauer 1999-09-28
5841967 Method and apparatus for design verification using emulation and simulation Stephen P. Sample 1998-11-24
5678028 Hardware-software debugger using simulation speed enhancing techniques including skipping unnecessary bus cycles, avoiding instruction fetch simulation, eliminating the need for explicit clock pulse generation and caching results of instruction decoding Ross T. Casley, Chiahon Chien, Abhijit Ghosh, Anurag Mithalal Jain, Michael Leigh Lipsie +2 more 1997-10-14
5485471 System for testing of digital integrated circuits 1996-01-16
5414716 Weighting system for testing of circuits utilizing determination of undetected faults 1995-05-09