Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11152921 | Systems and methods for control signal latching in memories | Rahul Sahu, Sharad Gupta | 2021-10-19 |
| 10811086 | SRAM write yield enhancement with pull-up strength modulation | Shiba Mohanty, Sharad Gupta, Rahul Sahu, Pradeep Raj, Adithya Bhaskaran +1 more | 2020-10-20 |
| 9928889 | Bitline precharge control and tracking scheme providing increased memory cycle speed for pseudo-dual-port memories | Mukund Narasimhan, Rakesh Sinha, Sharad Gupta | 2018-03-27 |
| 9865316 | Memory with a word line assertion delayed by a bit line discharge for write operations with improved write time and reduced write power | Sharad Gupta, Mukund Narasimhan | 2018-01-09 |
| 9607674 | Pulse latch reset tracking at high differential voltage | Mukund Narasimhan, Sharad Gupta | 2017-03-28 |