Issued Patents All Time
Showing 26–50 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11119696 | Technique of register space expansion with branched paging | Richard Dominic Wietfeldt | 2021-09-14 |
| 11119790 | Low latency clock-based control via serial bus | Richard Dominic Wietfeldt | 2021-09-14 |
| 11106620 | Mixed signal device address assignment | Richard Dominic Wietfeldt | 2021-08-31 |
| 11088815 | Techniques for timed-trigger and interrupt coexistence | Richard Dominic Wietfeldt, Umesh Srikantiah, Karthik Manivannan | 2021-08-10 |
| 11023408 | I3C single data rate write flow control | Radu Pitigoi-Aron, Chandan Pramod Attarde, Richard Dominic Wietfeldt | 2021-06-01 |
| 10997114 | Vector decoding in time-constrained double data rate interface | Richard Dominic Wietfeldt, Helena Deirdre O'Shea | 2021-05-04 |
| 10983552 | Low latency trigger activation mechanism using bus protocol enhancement | Richard Dominic Wietfeldt | 2021-04-20 |
| 10963035 | Low power PCIe | James Lionel Panian, Richard Dominic Wietfeldt, Mohit Kishore Prasad, Amit Gil, Shaul Yohai Yifrach | 2021-03-30 |
| 10924541 | Low-power and low-latency device enumeration with cartesian addressing | James Lionel Panian, Richard Dominic Wietfeldt | 2021-02-16 |
| 10872055 | Triple-data-rate technique for a synchronous link | Richard Dominic Wietfeldt, Helena Deirdre O'Shea | 2020-12-22 |
| 10838898 | Bit-interleaved bi-directional transmissions on a multi-drop bus for time-critical data exchange | Richard Dominic Wietfeldt | 2020-11-17 |
| 10733121 | Latency optimized I3C virtual GPIO with configurable operating mode and device skip | Radu Pitigoi-Aron, Richard Dominic Wietfeldt, Sharon Graif, Lior Amarilio, Kishalay Haldar +1 more | 2020-08-04 |
| 10693674 | In-datagram critical-signaling using pulse-count-modulation for I3C bus | Richard Dominic Wietfeldt, Radu Pitigoi-Aron | 2020-06-23 |
| 10642778 | Slave master-write/read datagram payload extension | Mohit Kishore Prasad, Richard Dominic Wietfeldt, Christopher Kong Yee Chun | 2020-05-05 |
| 10635630 | Flexible protocol and associated hardware for one-wire radio frequency front-end interface | Richard Dominic Wietfeldt | 2020-04-28 |
| 10627881 | Back power protection (BPP) in a system on a chip (SOC) with critical signaling scheme | Richard Dominic Wietfeldt, Chiew-Guan Tan, Alex Kuang-Hsuan Tu | 2020-04-21 |
| 10614009 | Asynchronous interrupt with synchronous polling and inhibit options on an RFFE bus | Richard Dominic Wietfeldt, Helena Deirdre O'Shea, Wolfgang Roethig, Christopher Kong Yee Chun, ZhenQi CHEN +4 more | 2020-04-07 |
| 10592441 | Bus communication enhancement based on identification capture during bus arbitration | Christopher Kong Yee Chun, Richard Dominic Wietfeldt, Mohit Kishore Prasad | 2020-03-17 |
| 10579549 | Staggered transmissions on a multi-drop half-duplex bus | Richard Dominic Wietfeldt | 2020-03-03 |
| 10572410 | Function-specific communication on a multi-drop bus for coexistence management | Helena Deirdre O'Shea, Richard Dominic Wietfeldt, Mohit Kishore Prasad, Amit Gil, Gary Chang | 2020-02-25 |
| 10572438 | Dynamic optimal data sampling time on a multi-drop bus | Richard Dominic Wietfeldt, Christopher Kong Yee Chun, Radu Pitigoi-Aron | 2020-02-25 |
| 10545886 | Clock line driving for single-cycle data over clock signaling and pre-emption request in a multi-drop bus | Richard Dominic Wietfeldt | 2020-01-28 |
| 10528503 | Real-time dynamic addressing scheme for device priority management | Richard Dominic Wietfeldt | 2020-01-07 |
| 10521392 | Slave master-write/read datagram payload extension | Mohit Kishore Prasad, Richard Dominic Wietfeldt, Christopher Kong Yee Chun | 2019-12-31 |
| 10515044 | Communicating heterogeneous virtual general-purpose input/output messages over an I3C bus | Richard Dominic Wietfeldt, Radu Pitigoi-Aron | 2019-12-24 |