Issued Patents All Time
Showing 51–75 of 89 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9378793 | Integrated MRAM module | Xiangyu Dong, Jung Pill Kim | 2016-06-28 |
| 9304913 | Mixed memory type hybrid cache | Xiangyu Dong | 2016-04-05 |
| 9299457 | Kernel masking of DRAM defects | Dexter Tamio Chun, Yanru Li, Xiangyu Dong, Jung Pill Kim, Deepti Vijayalakshmi Sriramagiri | 2016-03-29 |
| 9274715 | Methods and apparatuses for in-system field repair and recovery from memory failures | Dexter Tamio Chun, Stephen Molloy, Jung Pill Kim | 2016-03-01 |
| 9274888 | Method and apparatus for multiple-bit DRAM error recovery | Dexter Tamio Chun, Jung Pill Kim, Hyunsuk Shin | 2016-03-01 |
| 9250998 | Cache structure with parity-protected clean data and ECC-protected dirty data | Xiangyu Dong | 2016-02-02 |
| 9245881 | Selective fabrication of high-capacitance insulator for a metal-oxide-metal capacitor | Woo-Tag Kang, Jonghae Kim | 2016-01-26 |
| 9245871 | Vertically stackable dies having chip identifier structures | — | 2016-01-26 |
| 9239788 | Split write operation for resistive memory cache | Xiangyu Dong, Xiaochun Zhu | 2016-01-19 |
| 9230634 | Refresh scheme for memory cells with next bit table | Jung Pill Kim, Xiangyu Dong | 2016-01-05 |
| 9224452 | Heterogeneous memory systems, and related methods and computer-readable media for supporting heterogeneous memory access requests in processor-based systems | Xiangyu Dong | 2015-12-29 |
| 9224467 | Resistance-based memory having two-diode access device | Wuyang Hao, Kangho Lee, Taehyun Kim, Jung Pill Kim, Seung H. Kang | 2015-12-29 |
| 9224442 | System and method to dynamically determine a timing parameter of a memory device | Xiangyu Dong | 2015-12-29 |
| 9087765 | System-in-package with interposer pitch adapter | Dexter Tamio Chun, Urmi Ray, Shiqun Gu | 2015-07-21 |
| 9014749 | System and method to initiate a housekeeping operation at a mobile device | Thomas R. Toms, Hari M. Rao, Seung H. Kang, Jung Pill Kim | 2015-04-21 |
| 8982654 | DRAM sub-array level refresh | Xiangyu Dong | 2015-03-17 |
| 8797792 | Non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junction | Hari M. Rao, Jung Pil Kim, Seung H. Kang, Xiaochun Zhu, Tae Hyun Kim +8 more | 2014-08-05 |
| 8786355 | Low-power voltage reference circuit | Wuyang Hao | 2014-07-22 |
| 8698321 | Vertically stackable dies having chip identifier structures | — | 2014-04-15 |
| 8638590 | Resistance based memory having two-diode access device | Wuyang Hao, Kangho Lee, Tae Hyun Kim, Jung Pill Kim, Seung H. Kang | 2014-01-28 |
| 8621324 | Embedded DRAM having low power self-correction capability | — | 2013-12-31 |
| 8578222 | SerDes power throttling as a function of detected error rate | Dexter Tamio Chun, Jack K. Wolf, Tirdad Sowlati | 2013-11-05 |
| 8547736 | Generating a non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junction | Hari M. Rao, Jung Pill Kim, Seung H. Kang, Xiaochun Zhu, Tae Hyun Kim +8 more | 2013-10-01 |
| 8493134 | Method and apparatus to provide a clock signal to a charge pump | Wuyang Hao, Jung Pill Kim | 2013-07-23 |
| 8492905 | Vertically stackable dies having chip identifier structures | — | 2013-07-23 |