Issued Patents All Time
Showing 101–125 of 153 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8576617 | Circuit and method for generating a reference level for a magnetic random access memory element | Xiaochun Zhu, Xia Li, Wenqing Wu, Seung H. Kang | 2013-11-05 |
| 8570797 | Magnetic random access memory (MRAM) read with reduced disturb failure | Tae Hyun Kim, Kangho Lee | 2013-10-29 |
| 8547736 | Generating a non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junction | Hari M. Rao, Seung H. Kang, Xiaochun Zhu, Tae Hyun Kim, Kangho Lee +8 more | 2013-10-01 |
| 8537606 | Read sensing circuit and method with equalization timing | Tae Hyun Kim | 2013-09-17 |
| 8531902 | Sensing circuit | Seong-Ook Jung, Jisu Kim, Kyungho Ryu, Seung H. Kang | 2013-09-10 |
| 8526266 | Row-decoder circuit and method with dual power systems | Tae Hyun Kim, Seung H. Kang | 2013-09-03 |
| 8493134 | Method and apparatus to provide a clock signal to a charge pump | Wuyang Hao, Jungwon Suh | 2013-07-23 |
| 8488363 | Write energy conservation in memory | Hari M. Rao, Taehyun Kim, Xiaochun Zhu, Kangho Lee, Wuyang Hao | 2013-07-16 |
| 8446753 | Reference cell write operations at a memory | Hari M. Rao, Xia Li | 2013-05-21 |
| 8441850 | Magnetic random access memory (MRAM) layout with uniform pattern | Kangho Lee, Tae Hyun Kim, Xia Li, Seung H. Kang | 2013-05-14 |
| 8406064 | Latching circuit | Seong-Ook Jung, Kyungho Ryu, Jisu Kim, Seung H. Kang | 2013-03-26 |
| 8406072 | System and method of reference cell testing | Tae Hyun Kim, Hari M. Rao | 2013-03-26 |
| 8400822 | Multi-port non-volatile memory that includes a resistive memory element | Hari M. Rao | 2013-03-19 |
| 8320167 | Programmable write driver for STT-MRAM | Hari M. Rao, Kangho Lee | 2012-11-27 |
| 8315081 | Memory cell that includes multiple non-volatile memories | Hari M. Rao, Siamack Haghighi | 2012-11-20 |
| 8208291 | System and method to control a direction of a current applied to a magnetic tunnel junction | Hari M. Rao, Kangho Lee | 2012-06-26 |
| 7975170 | Memory refresh system and method | Klaus Hummler, Jong-Hoon Oh, Wayne F. Ellis, Oliver Kiehl, Josef Schnell +2 more | 2011-07-05 |
| 7944047 | Method and structure of expanding, upgrading, or fixing multi-chip package | Jong-Hoon Oh, Klaus Hummler, Oliver Kiehl, Josef Schnell, Wayne F. Ellis +2 more | 2011-05-17 |
| 7882324 | Method and apparatus for synchronizing memory enabled systems with master-slave architecture | Josef Schnell, Klaus Hummler, Jong-Hoon Oh, Wayne F. Ellis, Oliver Kiehl +2 more | 2011-02-01 |
| 7721010 | Method and apparatus for implementing memory enabled systems using master-slave architecture | Josef Schnell, Klaus Hummler, Jong-Hoon Oh, Wayne F. Ellis, Oliver Kiehl +2 more | 2010-05-18 |
| 7694196 | Self-diagnostic scheme for detecting errors | Josef Schnell, Klaus Hummler, Jong-Hoon Oh, Wayne F. Ellis, Oliver Kiehl +2 more | 2010-04-06 |
| 7688665 | Structure to share internally generated voltages between chips in MCP | Jong-Hoon Oh, Oliver Kiehl, Josef Schnell, Klaus Hummler, Wayne F. Ellis +2 more | 2010-03-30 |
| 7539034 | Memory configured on a common substrate | Jong-Hoon Oh, Oliver Kiehl, Josef Schnell, Klaus Hummler, Wayne F. Ellis +2 more | 2009-05-26 |
| 7453302 | Temperature compensated delay signals | Thoai-Thai Le | 2008-11-18 |
| 7304517 | Duty cycle corrector | Joonho Kim, Jonghee Han | 2007-12-04 |