JX

John Y. Xie

PL Prolinx Labs: 6 patents #5 of 8Top 65%
IN Intel: 1 patents #18,218 of 30,777Top 60%
📍 San Jose, CA: #8,424 of 32,062 inventorsTop 30%
🗺 California: #82,707 of 386,348 inventorsTop 25%
Overall (All Time): #754,460 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
7276399 Method of designing a module-based flip chip substrate design Vincent Hool 2007-10-02
6034427 Ball grid array structure and method for packaging an integrated circuit chip James J. D. Lan, Steve S. Chiang, Paul Ying-Fung Wu, William H. Shepherd, Hang Jiang 2000-03-07
5987744 Method for supporting one or more electronic components James J. D. Lan, Steve S. Chiang, Paul Ying-Fung Wu 1999-11-23
5906042 Method and structure to interconnect traces of two conductive layers in a printed circuit board James J. D. Lan, Steve S. Chiang, William H. Shepherd, Paul Ying-Fung Wu 1999-05-25
5872338 Multilayer board having insulating isolation rings James J. D. Lan, Steve S. Chiang, Paul Ying-Fung Wu 1999-02-16
5834824 Use of conductive particles in a nonconductive body as an integrated circuit antifuse William H. Shepherd, Steve S. Chiang 1998-11-10
5767575 Ball grid array structure and method for packaging an integrated circuit chip James J. D. Lan, Steve S. Chiang, Paul Ying-Fung Wu, William H. Shepherd, Hang Jiang 1998-06-16