Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7807480 | Test cells for semiconductor yield improvement | Brian E. Stine, Victor Kitch, Mark Zwald | 2010-10-05 |
| 7489151 | Layout for DUT arrays used in semiconductor wafer testing | Christopher Hess, Angelo Rossoni, Michele Squicciarini, Michele Quarantelli | 2009-02-10 |
| 7487474 | Designing an integrated circuit to improve yield using a variant design element | Dennis Ciplickas, Joe Davis, Christopher Hess, Sherry Lee, Enrico Malavasi +9 more | 2009-02-03 |
| 6380592 | Low power RAM memory cell using a precharge line pulse during write operation | Michael Tooher | 2002-04-30 |