Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8589833 | Method for the definition of a library of application-domain-specific logic cells | Veerbhan Kheterpal, Lawrence Pileggi | 2013-11-19 |
| 8271916 | Method for the definition of a library of application-domain-specific logic cells | Veerbhan Kheterpal, Lawrence Pileggi | 2012-09-18 |
| 7827516 | Method and system for grouping logic in an integrated circuit design to minimize number of transistors and number of unique geometry patterns | Matthew Moe, Lawrence Pileggi, Vyacheslav Rovner, Thiago Hersan, Veerbhan Kheterpal | 2010-11-02 |
| 7784013 | Method for the definition of a library of application-domain-specific logic cells | Veerbhan Kheterpal, Lawrence Pileggi | 2010-08-24 |
| 7757187 | Method for mapping a Boolean logic network to a limited set of application-domain specific logic cells | Veerbhan Kheterpal, Lawrence Pileggi | 2010-07-13 |