Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multilayer interconnect structure and method for integrated circuits

Multilayer interconnect structure and method for integrated circuits

US Patent RE50384 · Granted Apr 15, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Integration of finFET device2021
Method of printing multiple structure widths using spacer double patterning2015
Method of forming semiconductor device with multiple level patterning2014
Optical polarizer with nanotube array2014
Multilayer interconnect structure and method for integrated circuits2014
Spacer lithography2014
Method for forming a high resolution resist pattern on a semiconductor wafer2013
Spacer double patterning that prints multiple CD in front-end-of-line2013
Double exposure technology using high etching selectivity2013
Method for forming an interconnect structure2013
Methods for fabricating semiconductor devices2012
Method of forming semiconductor device2012