Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Microprocessor in which multiple instructions are executed in one clock

Microprocessor in which multiple instructions are executed in one clock

US Patent H1291 · Granted Feb 1, 1994

Assignee

No assignee recorded.

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Device, method and system for providing a stacked arrangement of integrated circ2023
Device, method and system for providing a stacked arrangement of integrated circ2022
Dynamic partial power down of memory-side cache in a 2-level memory hierarchy2021
Apparatus and method for implementing a multi-level memory hierarchy having diff2021
Dynamic partial power down of memory-side cache in a 2-level memory hierarchy2020
Apparatus and method for implementing a multi-level memory hierarchy2020
Methods and apparatus to suspend and resume computing systems2020
QoS based binary translation and application streaming2019
Two-level system main memory2019
Apparatus and method for implementing a multi-level memory hierarchy2019
Multiple register memory access instructions, processors, methods, and systems2019
Multiple register memory access instructions, processors, methods, and systems2018