Assignee
Inventors
- Greg M. Hess (40 patents)
- Ramesh Arvapalli (3 patents)
{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Dynamic global memory bit line usage as storage node", "item": "https://www.patentleaderboard.com/patent/9236100"}]}
Skip to contentUS Patent 9236100 · Granted Jan 12, 2016