Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Buried sublevel metallizations for improved transistor density

Buried sublevel metallizations for improved transistor density

US Patent 8941182 · Granted Jan 27, 2015

Estimated economic value: $1,455,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Control device for a motor vehicle2025
Control unit for a motor vehicle and method for producing and measuring the tigh2024
Method for magnetising at least two magnets having different magnetic coercivity2021
Method for monitoring an electromechanical component of an automation system2019
Method of forming a semiconductor device and according semiconductor device2017
Alignment monitoring structure and alignment monitoring method for semiconductor2017
Semiconductor device comprising contact structures with protection layers formed2017
Semiconductor device comprising contact structures with protection layers formed2017
Polarized electromagnetic relay and method for production thereof2016
Relay having two switches that can be actuated in opposite directions2016
Methods for forming protection layers on sidewalls of contact etch stop layers2016
Methods for forming protection layers on sidewalls of contact etch stop layers2016