Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Graphical user interface for physically aware clock tree planning

Graphical user interface for physically aware clock tree planning

US Patent 8826211 · Granted Sep 2, 2014

Estimated economic value: $26,625,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semantic analysis of source code using stubs for external references2024
Clock topology planning for reduced power consumption2016
Clock topology planning for reduced power consumption2016
Methods, systems, and apparatus for clock topology planning with reduced power c2016
Methods, systems, and apparatus for clock topology planning with reduced power c2016
Methods for construction and optimization of a clock tree plan for reduced power2015
Methods for construction and optimization of a clock tree plan for reduced power2015
Physically aware logic synthesis of integrated circuit designs2014
Minimal logic duplication for preserving reset behavior post-retiming2013
Boundary buffers to model register incompatibility during pre-retiming optimizat2013
Integrated circuit netlist migration2010