AH

Aaron Paul Hurst

CS Cadence Design Systems: 6 patents #235 of 2,263Top 15%
BS Black Duck Software: 1 patents #10 of 28Top 40%
📍 San Francisco, CA: #6,191 of 26,999 inventorsTop 25%
🗺 California: #82,707 of 386,348 inventorsTop 25%
Overall (All Time): #698,418 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
12099835 Semantic analysis of source code using stubs for external references Cameron Gunnin, Edward Moriarty, Simon Fredrick Vicente Goldsmith 2024-09-24
9411912 Clock topology planning for reduced power consumption Ankush Sood 2016-08-09
9280614 Methods, systems, and apparatus for clock topology planning with reduced power consumption Ankush Sood 2016-03-08
9135375 Methods for construction and optimization of a clock tree plan for reduced power consumption Ankush Sood 2015-09-15
8826211 Graphical user interface for physically aware clock tree planning Ankush Sood 2014-09-02
8438511 Minimal logic duplication for preserving reset behavior post-retiming 2013-05-07
8423939 Boundary buffers to model register incompatibility during pre-retiming optimization 2013-04-16