Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure

Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure

US Patent 8709903 · Granted Apr 29, 2014

Estimated economic value: $5,775,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Photodetector structure with air gap and related methods2025
Integration of compound-semiconductor-based devices and silicon-based devices2025
Photodiode with insulator layer along intrinsic region sidewall2025
Switches in bulk substrate2025
Heterojunction bipolar transistor with buried trap rich isolation region2025
Photodiodes2025
Semiconductor structure including photodiode-based fluid sensor and methods2025
Bipolar transistor with stepped emitter2025
Multi-channel transistor2024
Heterojunction bipolar transistor with buried trap rich isolation region2024
Structure including multi-level field plate and method of forming the structure2024
Semiconductor structure with semiconductor-on-insulator region and method2024