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Home › Configurable source based/requestor based error detection and correction for soft errors in multi-level cache memory to minimize CPU interrupt service routines

Configurable source based/requestor based error detection and correction for soft errors in multi-level cache memory to minimize CPU interrupt service routines

US Patent 8707127 · Granted Apr 22, 2014

Estimated economic value: $8,414,000 ⓘ

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