Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and circuitry for debugging a power-gated circuit

Method and circuitry for debugging a power-gated circuit

US Patent 8595563 · Granted Nov 26, 2013

Estimated economic value: $3,520,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Arbitrated interrupt steering in heterogeneous processors2025
Memory power performance state optimization during image display2025
Method and system for using deep learning to improve design verification by opti2025
Method of task transition between heterogenous processors2025
Reduced mesh lane routing2025
On-demand regulation of memory bandwidth utilization to service requirements of 2025
Low power memory state during non-idle processor state2025
Mechanism for performing distributed power management of a multi-GPU system by p2025
System-wide low power management2025
Scheduling training of an inter-chiplet interface2025
Operating voltage adjustment for aging circuits2025
Methods and devices for separation of blood components2025