Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory arrays and methods of forming memory cells

Memory arrays and methods of forming memory cells

US Patent 8546231 · Granted Oct 1, 2013

Estimated economic value: $5,978,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Decoding architecture for memory devices2025
Decoding architecture for memory devices2025
Reading a multi-level memory cell2025
Memory cell formation in three dimensional memory arrays using atomic layer depo2025
Accessing memory cells in a vertical memory array2025
Memory devices having one-time-programmable fuses and/or antifuses formed from t2025
Memory devices having one-time-programmable fuses and/or antifuses formed from t2025
Pillar and word line plate architecture for a memory array2025
Varying-polarity read operations for polarity-written memory cells2025
Unipolar programming of memory cells2025
Word line structures for three-dimensional memory arrays2025
Vertical memory architecture2025