Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Interleaving corresponding data elements from part of two source registers to destination register in processor operable to perform saturation

Interleaving corresponding data elements from part of two source registers to destination register in processor operable to perform saturation

US Patent 8521994 · Granted Aug 27, 2013

Estimated economic value: $11,735,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Machine learning model updates to ML accelerators2025
System-level techniques for error correction in chip-to-chip interfaces2025
Extended attributes for shared page tables2025
IC with adaptive chip-to-chip interface to support different chip-to-chip2024
Routing network using global address map with adaptive main memory expansion for2024
Fine-grained multi-tenant cache management2024
Cache coherent acceleration function virtualization with hierarchical partition 2024
Routing network using global address map with adaptive main memory expansion for2023
Hybrid hardware-software coherent framework2023
Logical transport overlayed over a physical transport having a tree topology2023
Hardware coherent computational expansion memory2023
Cache coherent acceleration function virtualization2022