Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuit and method for controlling a clock synchronizing circuit for low power refresh operation

Circuit and method for controlling a clock synchronizing circuit for low power refresh operation

US Patent 8400868 · Granted Mar 19, 2013

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method and apparatus for providing symmetrical output data for a double data rat2013
Circuit and method for controlling a clock synchronizing circuit for low power r2011
Circuit and method for controlling a clock synchronizing circuit for low power r2011
Method and apparatus for output data synchronization with system clock in DDR2011
Method and apparatus for providing symmetrical output data for a double data rat2011
Circuit and method for reducing power in a memory device during standby modes2010
Method and apparatus for ambient light detection2010
Circuit and method for controlling a clock synchronizing circuit for low power r2009
Circuit and method for controlling a clock synchronizing circuit for low power r2009
Method and unit for buffer control2009
Circuit and method for reducing power in a memory device during standby modes2008
Method and apparatus for providing symmetrical output data for a double data rat2008