Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Use of F-based gate etch to passivate the high-k/metal gate stack for deep submicron transistor technologies

Use of F-based gate etch to passivate the high-k/metal gate stack for deep submicron transistor technologies

US Patent 8319295 · Granted Nov 27, 2012

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Cointegration of gallium nitride and silicon2022
Low-defect graphene-based devices and interconnects2021
Method for forming a qubit device2021
Protecting a substrate region during fabrication of a FET sensor2020
Sequential integration process2019
Semi-sequential 3D integration2019
FET biosensor2019
Micro-stimulation and data acquisition from biological cells2019
Monolithic integration of semiconductor materials2019
Semi-sequential 3D integration2018
Precursor and process design for photo-assisted metal atomic layer deposition (A2018
Process and material for preventing deleterious expansion of high aspect ratio c2017