Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for thread priority control in a multi-threaded processor based upon branch issue information including branch confidence information

Method and apparatus for thread priority control in a multi-threaded processor based upon branch issue information including branch confidence information

US Patent 8255669 · Granted Aug 28, 2012

Estimated economic value: $8,752,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Instructions to count a number of contiguous register elements having specific v2024
Instructions to count a number of contiguous register elements having specific v2024
Memory access request for a memory protocol2023
Portions of configuration state registers in-memory2023
Suppressing branch prediction updates until forward progress is made in executio2022
Concurrent prediction of branch addresses and update of register contents2022
Automatic pinning of units of memory2022
Latent modification instruction for substituting functionality of instructions d2022
Selective suppression of instruction translation lookaside buffer (ITLB) access2021
Indicator-based prioritization of transactions2021
Dynamic fusion based on operand size2021
Concurrent prediction of branch addresses and update of register contents2021