Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Packaging an integrated circuit die with backside metallization

Packaging an integrated circuit die with backside metallization

US Patent 8236609 · Granted Aug 7, 2012

Estimated economic value: $2,344,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Systems and methods for analyzing chatbot communication sessions to reduce escal2025
Integrated circuit (IC) packages employing a capacitor-embedded, redistribution 2025
Package comprising integrated devices coupled through a metallization layer2023
Monomers and polymers for functional polycarbonates and poly(ester-carbonates) a2020
Semiconductor device comprising mold for top side and sidewall protection2018
Monomers and polymers for functional polycarbonates and poly(ester-carbonates) a2018
Monomers and polymers for functional polycarbonates and poly(ester-carbonates) a2016
Wafer level package without sidewall cracking2016
Thermal responsive polymer siloxanes, compositions, and method and applications 2016
System, method and apparatus for leadless surface mounted semiconductor package2016
Method for singulating electronic components from a substrate2015
Electronic device and method of packaging an electronic device2015