{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Write-leveling implementation in programmable logic devices", "item": "https://www.patentleaderboard.com/patent/8122275"}]}

Home › Write-leveling implementation in programmable logic devices

Write-leveling implementation in programmable logic devices

US Patent 8122275 · Granted Feb 21, 2012

Estimated economic value: $11,276,000 ⓘ

Assignee

Intel

Inventors

Yan Chong (90 patents)
Bonnie I. Wang (120 patents)
Chiakang Sung (194 patents)
Joseph Huang (212 patents)
Michael H. M. Chu (14 patents)

View full patent text on Google Patents →