Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Wafer level chip scale packaging structure and method of fabricating the same

Wafer level chip scale packaging structure and method of fabricating the same

US Patent 8039935 · Granted Oct 18, 2011

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Printed circuit board mesh routing to reduce solder ball joint failure during re2025
Chip package and manufacturing method thereof2025
Chip package and method for forming a chip package having first and second stack2025
Method of performing power saving control on display device and related display 2025
Chip package and method for forming the same2025
Package structure comprising conductive metal board and ground element2024
Package substrate and method of fabricating the same and chip package structure2023
Package substrate and method of fabricating the same2023
Chip package and manufacturing method thereof2023
Chip package2023
Chip package including substrate having through hole and redistribution line2023
Chip package including substrate inclined sidewall and redistribution line2022