Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Parallel architecture for matrix transposition

Parallel architecture for matrix transposition

US Patent 7797362 · Granted Sep 14, 2010

Estimated economic value: $5,425,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Using a hardware sequencer in a direct memory access system of a system on a chi2025
Performing load and permute with a single instruction in a system on a chip2024
Performing load and store operations of 2D arrays in a single cycle in a system 2024
Using per memory bank load caches for reducing power use in a system on a chip2024
Built-in self-test for a programmable vision accelerator of a system on a chip2024
Reduced memory write requirements in a system on a chip using automatic store pr2024
Hardware accelerated anomaly detection using a min/max collector in a system on 2024
Using a vector processor to configure a direct memory access system for feature 2024
Accelerating table lookups using a decoupled lookup table accelerator in a syste2023
Performing multiple point table lookups in a single cycle in a system on chip2023
Hardware accelerated anomaly detection using a min/max collector in a system on 2023
Programmable vision accelerator2023