Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Electronic device including a transistor structure having an active region adjacent to a stressor layer

Electronic device including a transistor structure having an active region adjacent to a stressor layer

US Patent 7714318 · Granted May 11, 2010

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Lateral semiconductor device having raised source and drain, and method of manuf2022
Semiconductor device comprising a PN junction diode2020
Semiconductor device including an active region and two layers having different 2017
Semiconductor device including an active region and two layers having different 2017
Semiconductor device including an active region and two layers having different 2017
Method for preconditioning thin film storage array for data retention2016
Split gate memory cell with a layer of nanocrystals with improved erase performa2016
Method of making a split gate non-volatile memory (NVM) cell2016
Split gate nanocrystal memory integration2016
Split-gate non-volatile memory cells having gap protection zones2016
Method of making a split gate non-volatile memory (NVM) cell and a logic transis2016
Memory with discrete storage elements2015