Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency

Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency

US Patent 7657891 · Granted Feb 2, 2010

Estimated economic value: $724,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Compositions and methods related to aptamer-based reversible cell selection2025
Defined composition gene modified T-cell products2025
Bispecific chimeric antigen receptors and encoding polynucleotides, vectors and 2025
Transgene genetic tags and methods of use2025
Fault detecting and fault tolerant multi-threaded processors2020
Preferred path network scheduling in multi-modem setup2020
Multi-modem scheduler for multimedia streams2020
IP level multipath protocol2020
Distributed leaky bucket based multi-modem scheduler for multimedia streams2019
Horizontally-shared cache victims in multiple core processors2014
Coherent instruction cache utilizing cache-op execution resources2013
Coherent instruction cache utilizing cache-op execution resources2013