Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for at-speed testing of digital circuits

Method and apparatus for at-speed testing of digital circuits

US Patent 7437636 · Granted Oct 14, 2008

Assignee

No assignee recorded.

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Universal compactor architecture for testing circuits2023
Trajectory-optimized test pattern generation for built-in self-test2023
Deterministic stellar built-in self test2023
Isometric control data generation for test compression2022
Layout-friendly test pattern decompressor2022
Flexible isometric decompressor architecture for test compression2021
Prediction of test pattern counts for scan configuration determination2021
Test generation using testability-based guidance2021
Scan cell architecture for improving test coverage and reducing test application2021
Test scheduling and test access in test compression environment2021
Signal probability-based test cube reordering and merging2020
Efficient and flexible network for streaming data in circuits2020