Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor

Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor

US Patent 7306997 · Granted Dec 11, 2007

Estimated economic value: $6,596,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor device and manufacturing method of semiconductor device2024
High yield package assembly technique2020
Negative capacitance matching in gate electrode structures2019
Negative capacitance matching in gate electrode structures2018
Fin-FET resonant body transistor2018
Methods to utilize piezoelectric materials as gate dielectric in high frequency 2018
Fin-FET resonant body transistor2018
III-V NFETs including channel barrier layers to reduce band-to-band leakage curr2017
Methods to utilize piezoelectric materials as gate dielectric in high frequency 2017
MEMs-based resonant FinFET2017
Methods of forming low defect replacement fins for a FinFET semiconductor device2017
Methods of forming different FinFET devices with different threshold voltages an2017