Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System and method for mode register control of data bus operating mode and impedance

System and method for mode register control of data bus operating mode and impedance

US Patent 7280410 · Granted Oct 9, 2007

Estimated economic value: $1,129,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Pre-sense gut node amplification in sense amplifier2024
Apparatuses and methods for storing redundancy repair information for memories2021
Apparatuses and methods for latching redundancy repair addresses at a memory2020
Apparatuses and methods for storing redundancy repair information for memories2019
Apparatuses and methods for latching redundancy repair addresses to avoid addres2019
Apparatuses having stacked devices and methods of connecting dice stacks2016
Apparatuses enabling concurrent communication between an interface die and a plu2015
Synchronous command-based write recovery time auto-precharge control2014
Configurable inputs and outputs for memory stacking system and method2013
Memory devices having programmable elements with accurate operating parameters s2012
Synchronous command-based write recovery time auto-precharge control2011
Method and circuit for off chip driver control, and memory device using same2011