Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Ultra-drowsy circuit

Ultra-drowsy circuit

US Patent 7236032 · Granted Jun 26, 2007

Estimated economic value: $20,503,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Low leakage state retention synchronizer2016
Latch with a feedback circuit2014
Clock synchronizer2010
Logic with state retentive sleep mode2010
Scan enabled storage device2006
Ultra-drowsy circuit2006
Apparatus and circuit having reduced leakage current and method therefor2006
Slave-less edge-triggered flip-flop2005
Apparatus and circuit having reduced leakage current and method therefor2004
Method and apparatus for protecting gate electrodes of target transistors in the2000
Information encoding by multiple line selection1999
Apparatus for protecting gate electrodes of target transistors in a gate array f1998