{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Method and circuit for adjusting the timing of output data based on an operational mode of output drivers", "item": "https://www.patentleaderboard.com/patent/6975149"}]}
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Home › Method and circuit for adjusting the timing of output data based on an operational mode of output drivers

Method and circuit for adjusting the timing of output data based on an operational mode of output drivers

US Patent 6975149 · Granted Dec 13, 2005

Estimated economic value: $1,839,000 ⓘ

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